Internship requirements:

• Object Orientated Programming knowledge (we use C++ and SystemVerilog)
• Debugging skills
• Understanding of computer architecture
• Assembly programming experience is a plus (x86, arm, etc.)
• Fluency in verbal and written English

Nice to have:

• Knowledge of verification methodologies like UVM
• Direct experience with Verilog simulators (ModelSim, VCS, Eda Playground, etc.)
• Experience in Mixed-Signal verification
• Constrained-random stimulus generation
• Directed test-bench programming / Development of self-checking environments
• Personal Competencies:
• Analytical thinking
• Goal-oriented
• Good communication skills
• Self-driven, but capable to work within a team
• Has a strong desire for personal achievement

Expected tasks:

• Perform functional feature verification of high-speed Microprocessor designs
• Defining, developing and executing test/coverage plans at unit and system level
• Based on a thorough understanding of the design architecture, develop, run and debug directed tests, random exercisers and the needed infrastructure to validate functionality (Checkers/Monitors/etc.)
• UVM/C++ based testbench development
• SystemVerilog/X86 Assembly test development
• Debugging designs in Verilog and SystemVerilog
• Develop verification flow enhancements using scripting languages

Benefits:

• Competitive salary package
• Flexible working schedule
• Challenging and professional work environment within a global organization
• Mentorship programs and various training sessions
• Opportunity to work for/with international top companies
• Private medical health insurance
• Different amenities for your comfort at the office